An intrinsic problem shared by computer system manufacturers is the need for increased computer system performance without a commensurate increase in energy consumption or cost. Developers of electrical communication architectures struggle to balance the dichotomy for increased performance required of electronic systems while addressing lower power consumption, smaller form factor, and lower electromagnetic emissions. Better solutions dealing with scalability while reducing power consumption in computer systems are desirable. However, typical electronic solutions to these problems may increase the cost of many computer systems because of increased pin count and/or die area, and because of increased power consumption, a major cause of which is the need to communicate over long signal lines.
Increasing system performance of one or more dual in-line memory modules (“DIMMs”) is just one of many computer system examples of how energy consumption and costs increase while attempting to increase DIMM performance. A DIMM is a small circuit board that contains a number of discrete, dynamic random access memory (“DRAM”) chips that are connected to a memory controller using electronic interconnects forming one or more channels on a system board. There are many ways to increase DIMM performance, such as increasing capacity, increasing the number of channels, increasing the number of DRAM banks or ranks, improving bandwidth, decreasing latency, or some combination of these ways. However, typical electronic solutions to these problems often increase the cost of the memory modules either because of increased pin count and/or die area, or increased power consumption. As mentioned above, a major cause of the increased power consumption is the need to communicate over long signal lines. Increasing the front side bus speed also causes a linear increase in interface power consumption. An additional interconnect issue associated with increasing the number of DIMM ranks at increased front side bus speeds is that both signal timing and noise are problems in the multi-drop signal lines that connect multiple DIMMs. This so called “stub electronics” problem has led to memory buses being replaced by point to point memory channels requiring additional external buffers to interface to the DRAMs. However, most DRAM efforts have focused on the creation of higher density memory devices with an electrical DIMM to processor chip interconnect.
Engineers have recognized a need for high-speed, high-bandwidth interconnects without the power and cost considerations associated with additional pins and long signal lines and which also maintains signal integrity.